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Miguel Garvie, Adrian Thompson
Evolutionary techniques are applied to the design of self-checking digital circuits in simulation. For the combinational and sequential benchmarks attempted, evolved designs are totally self-checking with respect to single stuck-at faults in mission logic, have no latency and use significantly less resources than hand-designed equivalents. The approach can be extended to evolve fail-safe circuits, analog self-test, and self-checking checkers under multiple faults.