The idea of enabling sophisticated behaviour to arise from an unusually small number of electronic components by allowing them to interact more freely than is customary dates back at least as far as Grey Walter's electromechanical `tortoises' in 1949 (when the active components were thermionic valves and relays)[6]. More recently, Mead's philosophy for analogue neural VLSI has been to exploit the behaviours that semiconductor structures naturally exhibit, rather than choosing a set of functions and then trying to implement them in hardware [9]. In `Pulse-stream' neural networks, the use of continuous-time dynamics has been demonstrated to release new power from a digital substrate [10].
The core principle that these ideas approach is to look for an efficient composition of electronic components selected from a set of physical (not abstract) resources, such that their coupled natural behaviours collectively give rise to the required overall system behaviour. In this paper, we have seen evolution do exactly that. A `primordial soup' of reconfigurable electronic components has been manipulated according to the overall behaviour it exhibits, and on no other criterion, with no constraints imposed upon the structure or its dynamical behaviour other than those inherent in the resources provided.
For a human to design such a system on paper would require the set of coupled differential equations describing the detailed electronic and electromagnetic interactions of every piece of metal, oxide, doped silicon, etc., in the system to be considered at all stages of the design process. Because this is not practical, the structure and dynamical behaviour of the system must be constrained to make design tractable. The basic strategy is to: (1) Break the system into smaller parts that can be understood individually. (2) Restrict the interactions between these parts so that can be understood. (3) Apply 1 and 2 hierarchically, allowing design at increasing levels of abstraction.
Thus, conventional design always requires constraints to be applied to the
circuit's spatial structure and/or dynamical behaviour. Evolution, working by
judging the effects of variations applied to the real physical hardware, does
not. That is why the circuit was evolved without the enforcement of any
spatial structure, such as limitations upon recurrent connections, or the
imposition of modularity, and without dynamical constraints such as a
synchronising clock or handshaking between modules.
This sets free all of the detailed properties of the
components to be used in developing the required overall behaviour. It is
reasonable to claim that the evolved circuit consequently uses significantly
less silicon area than would be required by a human designer faced with the
same problem, but such assertions are always open to attack from genius
designers.
The outstanding problem with allowing evolution a free hand to exploit the
resources is that the evolving circuits can become tailored too specifically
to the exact conditions prevailing during evolution. For instance, our example
circuit was shown to be using subtle interactions between adjacent components
on the silicon; surely if this evolved configuration were used with
another, nominally identical, FPGA chip then it would no longer work? Every
chip has slightly different propagation delays, capacitances, etc., and the
circuit could have come crucially to rely on those of the particular chip on
which it was evolved. To investigate this question, the final population at
generation 5000 was used to configure a completely different 
region of the same FPGA chip (Fig. 9).
Figure 9: Moving the circuit to a different region of the FPGA.
When used to configure this new region, the individual in the population that
was fittest at the old position deteriorated by 
%. However,
there was another individual in the population which, at the new position, was
within 0.1% of perfect fitness. Evolution was allowed to continue at the
new position, and after only 100 generations had recovered perfect
performance. When this new population was moved back to the original
region of silicon, again the transfer reduced the fitness of the individual
that used to be fittest, but there was another individual in the population
that behaved perfectly there.
Recall that the circuit works perfectly over the 
C range of
temperatures to which the population was exposed during evolution. This,
together with the ease with which evolution was observed to adapt the circuit
to work on a new region of silicon, suggests a unified solution to the problem
of evolving circuits with engineering tolerances. The plan is to have
nominally identical FPGA chips, selected from separate batches
(so as to be as different from each-other as possible), held at different
temperatures using Peltier-effect heat pumps, and with a range of permissible
power-supply voltages. To evaluate an individual's fitness, it will be tested
on each of the FPGAs and given a score according to its ability to perform
under all of these conditions. This will not slow down evolution because the
FPGAs can operate in parallel. The hope is that evolution will produce a
configuration that works at any permissible temperature and power-supply
voltage and for any FPGA of that type. Success is not certain, because it will
not be possible to expose the evolving circuits to every possible combination
of conditions, but there is good reason to think that it can be made easier
for evolution to generalise than to specialise. If the unconstrained efficient
evolutionary exploitation of resources can be made an engineering
practicality, the pay-offs will be great.