Evolutionary algorithms (EAs) -- computer programs capturing the bare essentials of Darwinian evolution -- such as the genetic algorithm (GA), have been used since the 1960s to design or optimise engineering systems. More recently, they have been applied to the design of simulated artificial neural networks to achieve a predefined task, such as a robotic control or pattern recognition task. In a similar way, EAs can be used to design electronic circuits and there has been a significant international community researching such `evolvable hardware' or `evolutionary electronics' since around 1995, e.g. [13,14,15,12]. Of particular interest are reconfigurable electronic devices such as the Field Programmable Gate Array (FPGA). This type of silicon integrated circuit (chip) typically consists of an array of components with a variety of possible interconnections. It is possible for the user to set electronic switches that influence the behaviour of each component cell and how they are interconnected.
FPGAs (pioneered by our collaborator Xilinx Inc) are widely used in the electronics industry and come in a variety of types. Coinciding with the growth of interest in evolutionary electronics, FPGAs emerged that were large and that could be reconfigured quickly an unlimited number of times, as simply as by writing a stream of bits to a memory chip. This means that an evolved circuit design does not necessarily have to be simulated in software to determine its performance at the given task: it could also be automatically instantiated in a real physical reconfigurable device. The observed behaviour arises directly from the semiconductor physics; evolution can be allowed to exploit this physics, and the dynamical interactions of the components, in greater depth than could be simulated in a feasible time for anything but tiny systems.
This project followed on from Adrian Thompson's doctorate [16], which showed that if one is prepared to abandon the normal design rules as to how a circuit should operate and be structured, now allowing evolution to explore the full repertoire of semiconductor behaviours available from a physical FPGA device, then a successfully functional circuit can be evolved that is amazingly compact and which operates in a way alien to conventional design practice. There is also the promise that certain kinds of fault tolerance (or graceful degradation) can be integrated into the evolutionary design process, as well as requirements for low-power, small size, and so on.
However, if evolution is allowed to craft a circuit for one particular FPGA device without constraint, then the resulting circuit may operate only over a narrow range of environmental conditions. For example, it may only work over a narrow range of temperature, or only on that one particular FPGA chip. The primary aim of this project was to see if evolution could be allowed directly to exploit physical devices without the imposition of design rules, yet be induced to produce a design robust to various perturbations such as fabrication variations of the FPGA or temperature changes. This is essential for most practical and commercial applications, and is one of the factors behind conventional design principles in both analog and digital circuit design. Can evolution produce a robust circuit that is still of a radically new kind, yet be robust without simply having to rediscover known design rules?
There was no serious deviation from the planned work or expenditure, except for the added objectives that were addressed.